Winbond's solution to the problem of bad bit lines

According to the financial world in November 2024, Winbond Electronics Co. filed a patent entitled “Semiconductor Memory and its Control Method”, which can be used to solve the problem of defective bit lines in the following way :

Designing a special memory cell array with a control circuit: constructing a memory cell array having a plurality of subarrays with corresponding control circuits. When any word line in one of the subarrays (subarray 1) is activated, the control circuit simultaneously activates the corresponding word line in another subarray (subarray 2) which is set apart from subarray 1 in the row direction.

Intelligent switching access unit: The control circuit monitors the number of defective bit lines in each subarray in real time. When the number of bad bit lines in subarray 1 is more than the number of spare bit lines in that subarray, the control circuit automatically switches to access the memory cell connected with activated word lines in subarray 2 instead of the memory cell connected with activated word lines in subarray 1, thus saving the problem of data access error caused by bad bit lines, ensuring that the data access will not be affected, and improving the reliability and performance of the overall memory. performance.